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Essentials for ESD Programs
Factory: technologies • Controls • Procedures
This two-day seminar consists of concentrated versions of the ten ESDA tutorials which comprise the ESDA Program Manager (PrM) Certification Program:
• ESD Basics for the Program Manager
• Ionization and Answers for the Program Manager
• Packaging Principles for the Program Manager
• System Level ESD/EMI: Testing to IEC and Other Standards
• Cleanroom Considerations for the Program Manager
• How To's of In-Plant ESD Survey and Evaluation Measurements
• Device Technology and Failure Analysis Overview
• Electrostatic Calculations for the Program Manager and the
ESD Engineer
• ESD Standards Overview for the Program Manager
• ESD Program Development & Assessment (ANSI/ESD S20.20 Seminar)
Key concepts and information from the above courses have been selected for this two-day seminar. Many of the demonstrations and videos from ESD Basics Tutorial are included in this seminar. Examples of electrostatics and ESD calculations are included where appropriate throughout the seminar. |
| Day One |
Part I
This section reviews the fundamentals of electrostatics, charge flow, electric field and voltage. The concept of capacitance and the fundamental relationship,
Q = CV, is introduced and explored with demonstrations and videos. The practical application of these concepts to the measurement of resistance, fields and voltages, and the relevant standards are reviewed and demonstrated. |
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Part II
The principles from Part I are then applied to grounding principles and standards, measurement of charge, standard models for ESD (i.e., human-body model and charged device model), and static induction with demonstrations and videos. Very simple and basic ESD protection circuit concepts and relevant failure analysis techniques are introduced and reviewed. |
| Day Two |
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Part III
Key ESD technical areas are reviewed such as air ionization, ESD-safe packaging, cleanroom principles and electrostatic attraction. Standards relevant to these areas are described. |
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Part IV
The final section includes charge generation test methods, additional ESDA standards, system-level ESD standards and testing, practical auditing techniques and strategies, and ESD event detection. The tutorial concludes with a review of ESD Protected-Areas (EPAs), ESD Program Management and the application of ANSI/ESD S20.20. |
| *This Seminar offers a broad exposure to the essentials of ESD programs. It offers a two day comprehensive set of factory technologies and procedures designed for managers, technicians, and specialists desiring ESD control program training and information. This course serves as a refresher class to those taking the PRM Certification exam. In addition, the course can be used as preparation for those interested in taking the iNARTE Engineering or Technician Certification exam. |
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ESD Device Design Essentials
This two-day seminar consists of concentrated versions of twelve ESDA tutorials which comprise the ESDA Device Design Certification Program.
•ESD On-Chip Protection in Advanced Technologies
•SPICE-Based ESD Protection Design Utilizing Diodes and Active MOSFET Rail Clamp Circuits
•EOS/ESD Failure Models and Mechanisms
•On-Chip ESD Protection in RF Technologies
•Charged Device Model Phenomena and Design
•Latch-up Physics and Design
•Circuit Modeling and Simulation for On-Chip Protection
•Troubleshooting On-Chip ESD Failures
•Device Testing--IC Component Level: HBM, CDM, MM, and TLP
•Impact of Technology Scaling on ESD High Current Phenomena and Implications for Robust ESD Design
•Transmission Line Pulse Measurements: Parametric Analyzer for ESD On-Chip Protection
•System Level ESD/EMI: Testing to IEC and other Standards
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| Day One |
PART I
This part reviews the fundamentals of ESD testing, high-current physics, and ESD modeling. The focus is on device-level (HBM, CDM, MM, TLP) and system level testing, impact of technology scaling on ESD high current phenomena, as well as circuit modeling and simulation for on-chip protection |
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PART II
The principles from part I are then applied to ESD Protection Design. This part describes ESD on-chip protection in advanced technologies, SPICE-based ESD protection design utilizing diodes and active MOSFET rail clamp circuits, etc. |
| Day Two |
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PART III
This part describes special ESD design cases, including Charged Device Model (CDM) phenomena and design, on-chip ESD protection in RF Technologies, and latch-up physics and design |
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PART IV
The final section discusses EOS/ESD failure models and mechanisms. The seminar concludes with practical examples for troubleshooting of on-chip ESD failures. |
| *This Seminar offers a broad exposure to the essentials of ESD programs. It offers a two day comprehensive set of factory technologies and procedures designed for managers, technicians, and specialists desiring ESD control program training and information. This course serves as a refresher class to those taking the PRM Certification exam. In addition, the course can be used as preparation for those interested in taking the iNARTE Engineering or Technician Certification exam. |
   
Revised: 8/17/2011 © Copyright, 1999-2013
ESD Association •
7900 Turin Road, Building 3 •
Rome, NY 13440-2069 USA •
Ph: +1 315-339-6937 •
Fax: +1 315-339-6793 •
email: info@esda.org
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