EOS/ESD Association, Inc.

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Manufacturing Symposium Technical Presentations

Technical Presentations

1.1 Electrical Fields: What to Worry About?
David E. Swenson, Affinity Static Control Consulting, LLC

ANSI ESD S20.20 originally required that process essential insulators with an electrical field greater than 2000 volts at 1 inch be kept >12 inches from ESD susceptible items: Is this adequate? Can a process essential insulator be put right on top of an ESD susceptible item if the electrical field is 1,999 volts at 1 inch? What is the risk from induction charging of ESD susceptible items?

1.2 Measuring Surface Voltages at Wafer Level Inside Equipment Under Real Process Conditions
Thomas Sebald, Philipp Molkentin, ESTION Technologies GmbH

With smaller feature sizes, thinner gate oxide layers and higher requirements on over-all uniformities, electrostatic charges at wafer level more and more comes into focus. ESD oxide-layer break-throughs during wet processes have been reported //1//. Nonuniform distribution of electron-work-function after cleaning process have been found with metrology tools //2// and could be correlated to electrostatic surface charges. To ensure stable process conditions and zero-defect trends it becomes mandatory to measure and control electrostatic charges at wafer level under real process conditions.

1.3 IC Failure Analysis Due to CBE and Secondary Discharge Effects by Voltage Suppressor Devices
Junsik Park, Jingook Kim, UNIST; Jongsung Lee, Cheolgu Jo, Byongsu Seol, Samsung

The CBE currents flowing through each ground or power pin of a DUT IC are measured and simulated at several different conditions of the discharging points, PCB structures, and decoupling capacitor placements. By investigating the current paths inside the IC, IC failure mechanisms are analyzed, and several strategies for IC protection are obtained.

1.4 Charge Board Event Experiment for Smart phone Module
Joshua Yoo, Ethan Choi, Elly Koo, Core Insight; Younchul Oh, Samsung Display; Evan Grund, Grund Technical Solutions

It has done several studies for 2G phone and early version of smartphone. These study was focused on ESD risk for devices on relatively small PCBs, not displays. In this study, we’ll be share more display focused ESD risk analysis and display related devices around display module We’ll show several single device CDM ESD discharge current and flat panel display module including same devices which has a lot bigger flexible printed circuit board and 6” display module.

1.5 Development of a Perfectly Balanced Electrostatic Eliminator Utilizing An Intermittent Pulse Ac Voltage Power Supply
Shinichi Yamaguchi, Akira Goto, Tomokatsu Saito, Kensuke Sakamoto, Hidemi Nagata, Shishido Electrostatic, LTD; Katsuyuki Takahashi, Iwate University

A perfectly balanced fan type electrostatic eliminator utilizing an intermittent pulse AC voltage power supply is developed. The short-term fluctuation range of the offset voltage (ion balance) is smaller than ±2 V without a sensor feedback system. The performance is maintained in 2500 h continuous operation.

1.6 Developing A Contact Cleaning Machine for the Smt Industry which has both Highly Effective Cleaning and Compliance With Ansi/Esd S20.20
Sheila Hamilton, Teknek, UK

This Case study highlights the difficulties of combining two vital functional requirements, cleaning and static control, for the SMT industry and will outline the novel approaches taken to overcome these difficulties.

1.7 “Topic 2 : Secondary Discharge Effects by Voltage Suppressor Devices”
Junsik Park, Jingook Kim, UNIST; Jongsung Lee, Cheolgu Jo, Byongsu Seol, Samsung

How to control the secondary discharge to reduce the systemlevel ESD noise in a mobile product?

1.8 System-level ESD Failure Diagnosis with Chip-Package-System Dynamic ESD Simulation with 3D ESD Gun
Robert (Soung-Ho) Myoung, ANSYS, Inc.; Byong-su Seol, Samsung Electronics Co., Ltd.

A comprehensive chip-package-system (CPS) electrostatic discharge (ESD) simulation methodology is developed for addressing IEC61000-4-2 testing conditions. An innovative chip ESD compact model is proposed, combined with full-wave models of the 3D ESD gun, ESD protection devices, PCB wires/vias and connectors for CPS analysis.

1.9 Die Attach & Wire Bonder ESD Risk Assessment & Considerations Seoul, South Korea
Marcus Koh, Yohan Goh Everfeed Technology Pte Ltd

  • Automated Handling Equipment (AHE) –Compliance verification 
  • ESD TR53
  • ANSI/ESD S20.20
  • ANSI/ESD S6.1
  • ESD Occurrences
  • AHE Audits –ANSI/ESD SP10.1
  • Not enough –Need additional assessments

1.10 EMI-Generated EOS in a Wire Bonder Tool
Icko Eric Timothy Iben, Michelle Lam, Dan Brown,IBM; Vladimir Kraz, OnFILTER

Previous study found EOS pulses on a wire bond tool (2013 ESDA Symposium, 2A.3, Iben et al). This Study Is To Survey The Wire Bonder Tool For Sources of EMI Using A Current Probe and Oscilloscope Attempt To Eliminate Any Measured EMI.

2.1 Patent Pending Dissipative Rubber in ESD Worksurfaces and Floor Matting
Andrew Mittermiller, Zeon Chemicals LP

Many electrostatic dissipating mats rely on conductive additives to dissipate static charge. These additives can migrate and bleed to the surface of the mat and then be removed by washing, use, or may simply degrade over time. These low-quality mats must be replaced or re-treated with the electrostatic dissipating additive to maintain their properties. The current mat technology is non-permanent and thus results in a high cost to the end user to maintain a static safe work area.

2.2 Analysis of Flowing Water Charging Mechanism in a PFA Tube
Daesung Jung, Jongmin Song, Sangyoon Soh, Samsung Electronics Co., Ltd.

For semiconductor process equipment, Perfluoroalkoxy alkanes (PFA) tubes are widely used for chemical transfer with good chemical robustness, low processing difficulty and low cost. However, the triboelectric characteristic of the tube blocks utilization of that in several applications. The property is severe enough to inducing arc from the chemical to the external GND which can cause a fire. Although it does not make a fire, process engineer needs to know the phenomena because the charged chemical can damage the device on the wafer in various semiconductor processing facilities. This presentation provides an empirical results and analysis of the phenomenon that can occur when transporting general water, DIW, and CO2 DIW through a PFA tube. It changes various factors including the initial charging state of the tube, flow rate, water flow time and it interprets the result from the ESD point of view.

2.3 EOS/ESD in IC Manufacturing Process of GQFN 64L Device
Bernard Chin, UTAC Headquarters Pte Ltd, Marcus Koh, Everfeed Technology Pte Ltd

This paper presents a case study of ESD/ EOS events causing low yield in trial lots prior to release of volume production. The use of line audits to check for static voltage, proper grounding and CDM discharge, voltage spike check and split-lot testing was used to determine the root cause.

2.4 Develop Robust Product & Process Through ESD PLC Management Review
Yong-Rae Kim, Continental

In recent years, the development period of automobiles has become shorter, automobile electronics are accelerating. Under such circumstances, it is not easy to strengthen the robustness of products and processes. Through this workshop, I would like to introduce & propose a robust design through PLC management.

2.5 Analysis for Thermal Effect and Burnout on Interconnect Metal Under ESD/EOS Stress


This presentation explores the thermal effect and burnout on interconnect metal under EOS/ESD Stress through the discussion of electromigration, thermomigration, and stress migration

2.6 Reducing EOS Current in Hot Bar Process in Manufacturing of Fiber Optics Components
Jeffrey Salisbury, Finisar; Vladimir Kraz, OnFILTER

This presentation will analyze EMI-caused EOS exposure in the process. Also it will illustrate how measuring just ground impedance is not sufficient to assure safe EOS environmentTo demonstrate typical EOS test. To show how easy it is to mitigate EOS problem with instantly-verifiable solution.

2.7 ESD Risk Analysis using Pulsed AC Ionization Technology
Joshua Yoo, Ethan Choi, Elly Koo, Core Insight

was ESD suspected failures in FPD industry. Steady-State DC type of ionizer solve problem initially and getting another ESD issue due to their lack of technology. Zebra effect – polarization issue within one glass panel and this can cause another type of ESD failures on panel. More uniform ion pattern requires to neutralize glass substrate within FPD processes. Pulsed AC (of fast bipolar switching) type of ionizers invented in early 2000 and used in many processes of FPD manufacturing areas and other application such as in-tool ionization due to their sizes are slim and compact.