EOS/ESD Association, Inc.

Setting the Global Standards for Static Control!

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Tutorials

Expert instructors will travel to your location to provide the tutorial(s) your employees need to perform their responsibilities, and to work toward professional certification. On-site tutorials are provided based on instructor availability, and require a commitment three months in advance of the tutorial date(s). There is a minimum payment required for 20 attendees per tutorial.

Contact  EOS/ESD Association, Inc. for more details regarding on-site tutorials, and to make your reservation.

Email: info@esda.org
Phone: 315-339-6937

Device Design

Click on title for course abstract.

DD100: ESD Circuits

Preview

Course Length: 3 Hours

This tutorial provides the foundation material for understanding electrostatics and ESD and their role in the manufacturing and handling of ESD sensitive devices. The fundamental properties of charge, electric fields, voltage, capacitance, and current are discussed with a view towards understanding key electrostatic phenomena and electrical processes. These include charge generation and decay, material properties, and induction. An overview of device failure mechanisms is presented, including how these models impact ESD control programs. Finally, the course provides an overview of ESD control procedures during handling and manufacturing and an overview of ANSI/ESD S20.20 program requirements. This full day course is required for those in-plant auditors and program managers who are working toward professional ESD certification. The presentation includes many in-class demonstrations, videos, and animated slides.
Some sample topics covered in this course are:

  • Definitions and relationships among important electrical and mechanical properties
  • Causes of charge generation and decay
  • Field effects and voltages
  • Role of capacitance in ESD (Q=CV)
  • Overview of key measurements including common pitfalls of some measurements
  • Review of ESD failure models
  • Understanding and demonstrating electrostatic induction
  • Utility and limitations of air ionization
  • Basic goals of ESD controls
  • Properties of effective ESD control products and materials
  • Overview of ANSI/ESD S20.20 ESD program development requirements

DD102: On-Chip ESD Protection in RF Technologies

Preview

Course Length: 1.5 Hours

Certification: DD

In this tutorial, electrostatic discharge (ESD) protection in both MOSFET- and bipolar-based radio frequency (RF) technologies is discussed. It covers ESD protection in RF CMOS, BiCMOS silicon germanium, gallium arsenide, and RF silicon-on-insulator (SOI). The tutorial will focus on how RF ESD design is distinct from digital CMOS ESD design. This tutorial will focus on device physics, technology, ESD layout design, ESD circuits, and design systems. It will present methods for co-synthesizing ESD networks for RF applications. The tutorial will provide examples of RF testing methodologies for ESD qualification of components and systems. HBM, MM, and TLP measurements of RF technologies will be provided. The tutorial will provide ESD input networks, differential pair networks, and ESD power clamps used in both RF CMOS and in RF BiCMOS technologies.

DD103: An Overview of Integrated Circuit ESD: The ESD Threat, Testing, Design Concepts and Debugging

Preview

Course Length: 3 Hours

Many Integrated Circuit (IC) designers do not have a working knowledge of ESD. This tutorial presents aspects of ESD that are relevant to IC designers and will enable them to improve their first time right ESD track record. This tutorial will also be useful for a wide range of specialists including layout designers, I/O designers, test engineers, failure analysis engineers, quality and reliability engineers, and architects as well as ESD design engineers just entering the field. The student will learn the fundamentals of ESD design, know the variables which affect ESD robustness, understand that ESD design needs to be addressed early in the design cycle and be better able to interact with ESD design specialists, understand ESD testing and interpret failure analysis data.

DD104: Electrostatic Discharge Effects in Integrated Circuit Technologies

Course Length: 1 Hour

This course will outline the fundamentals of ESD phenomena and the methods to control the effects of ESD for safe manufacturing of IC devices. The training material will include the nature of ESD transients, their impact on the IC devices, common methods to test for ESD at both the device level and the system board level, and the overall protection techniques. Finally, the course will review the advances in IC technologies that lead to future challenges for ESD development and the resulting important technology roadmap established by the ESD Association.

DD110: ESD From Basics to Advanced Protection Design

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Course Length: 3 Hours

Certification: DD

This course gives a comprehensive overview from ESD basics to ESD design principles covering up to the latest silicon technologies appealing to a variety of engineers from design to process technology, and failure analysis to quality. The attendee will have an in-depth understanding of the principles of ESD Device/Design along with a full perception of what it takes to address almost every kind of design scenario, how to apply rules of thumb for successful design, knowledge of lessons learned from case studies, and empowerment to communicate with customers on ESD quality issues.

DD112: Latch-up Fundamentals

Certification: DD

Latch-up continues to be of interest today in advanced CMOS, mixed signal (MS) CMOS, RF CMOS, BiCMOS and smart power technologies. Those attending this course will understand the fundamentals of CMOS latch-up. The course will focus on theory, test structures, application, experimental results, simulation and CAD design systems.  Those attending will also understand the impact of design, semiconductor process and circuits on CMOS latch-up.

DD117: TCAD Fundamentals

Course Length: 1.5 Hours

TCAD (technology computer aided design) tools have become an indispensable utensil for the semiconductor industry. The possibilities to analyze, predict and optimize a certain semiconductor device behavior through modeling semiconductor fabrication (Process TCAD) and semiconductor device operation (Device TCAD) are countless. This includes the area for ESD and Latch-up development, as early access to fundamental device parameters under very high current density and high temperature transients is the key to overcome the conceptual problem of concurrent engineering for ESD engineers.

This tutorial serves as a basic introduction into TCAD tool chain including process and device simulation as well as the creation and integration of compact models for mixed more simulation. Focus points are the capabilities but also limitations of these tools, like the requirements for a 2D/3D simulation approach and the validity of the models describing the fundamental physics, especially in the high temperature regime.

DD120: Device Testing – Component Level: HBM, CDM, MM, and TLP

Course Length: 3 Hours

Certification: DD

This tutorial addresses the basics of HBM, CDM, MM, and TLP ESD stress testing of the ESD protection structures of ICs. The differences among these models will be emphasized and then used to show how the different circuit parasitics affect the waveforms from each model-type simulator. The importance of doing ESD testing as an integral part of a high-quality component development and qualification efforts will be stressed. Since industry-wide TLP testing is fairly new, the tutorial will cover constant impedance and constant current TLP testing and also the TLP I-V-L characteristic plots including the snapback trigger voltages (Vt1) and currents (It1). The evolution of the leakage current (L) as it relates to the failure (It2) point will be emphasized, as well as the comparisons and correlations between HBM and TLP testing. Standards issues and test procedures will be discussed and some comparisons will be made between the ESDA and JEDEC ESD standards.

DD122/FC122: Use of the Digital Sampling Oscilloscope for ESD Measurements

Course Length: 3 Hours

The digital sampling oscilloscope (DSO) finds application in measuring waveforms that occur infrequently or only once. Its sophisticated calculation and display capabilities give it utility for factory ESD, as well as, its role in monitoring ESD immunity waveforms for both component and system level ESD.Understanding instrument performance issues is important for proper use. DSO bandwidth and the sampling rate are often used interchangeably, although they serve completely different purposes. The bandwidth, sampling rate and memory depth of the instrument must be specified for the intended application. DSOs also have display modes which can hide undersampling artifacts and lead to incorrect conclusions. Selecting the appropriate display algorithm is important for both cosmetic purposes and to achieve correct results from the instrument. Also important for the proper use of any oscilloscope are selection of the input impedance and the setup of the trigger. For a DSO, the pretrigger value must also be set. In some cases equivalent time sampling can be used but in most ESD measurements, single shot acquisition is required. Finally, for ESD applications on the factory floor, there are a variety of probes that are used. These include, wide bandwidth current probes, clamp on current probes, single ended and differential voltage probes, as well as, high frequency antennas.

DD130/FC130: System Level ESD/EMI: Testing to IEC and other Standards

Available Online

Course Length: 3 Hours

Certification: PrM, DD

This tutorial is intended to help those tasked with testing products to IEC and other system level ESD standards by providing detailed information on IEC 61000-4-2, the most widely used standard, and highlighting the harmonization and differences among IEC, ANSI, Telcordia, and some automotive ESD standards. We will answer common questions regarding test set-ups, test points, and procedures, and address key issues, including: 1) Differences between "verification" and "calibration" and when is each required; the influence of ESDA WG14 technical report (TR) on IEC and how it affects the calibration and verification procedures. 2) Test set-up requirements, the test environment, ground connections, and return paths and ground plane effects. 3) Testing procedures with demonstration on actual products, how the tester affects test results, and problems with test result variations due to simulator influences. 4) What points need to be tested and why, guidance on determining "operator accessible" points and ports, exempted points and ports, and what to do around connectors and connector pins. 5) ANSI and other ESD standards, the drive toward harmonization with IEC, why standards will probably never be the same as IEC, and the scope of different standards. This system level ESD tutorial will cover several facets of ESD as applied to electronic systems.

DD230/FC230: System Level ESD/EMI (Principles, Design Troubleshooting, & Demonstrations)

Preview

Course Length: 3 Hours

This system level ESD tutorial will cover several facets of ESD as applied to electronic systems. Many of the principles and troubleshooting techniques will be demonstrated on real circuits for the students, with several new experiments added since previous years. “War” stories will also be used to illustrate points. The emphasis will be on making the experience both entertaining and informative for the students using an intuitive approach without heavy mathematics. Topics covered will include 1) Characteristics of ESD events; 2) ESD principles as applied to electronic systems; 3) Design troubleshooting techniques; 4) Unusual forms of ESD that have been the cause of field failures including internal chair discharges; 5) High-frequency measurement techniques; and 6) System design principles. It is recommended that those attending this tutorial section have at least one year of a college level electronics circuits course. Knowledge of common circuit analysis techniques will be assumed.

DD131: HMM Basics: Proposed Test Method, Testing Procedures, and Round Robin Study

Course Length: 1.5 Hours

This tutorial will explain in detail how to test to the HMM standard practice and how it attempts to bring consistency to testing components to the IEC 61000-4-2 standard. The scope and purpose of the HMM standard practice will be reviewed. The waveform used in this test and its critical specifications are presented along with the qualified equipment used to deliver the waveform. Executing a test is presented via three test configurations. Equipment specifics and recommended grounding are also covered.

The tutorial also reviews several controlled experiments to determine amount of variability that is typical in this type of test. One of the experiments is a round robin study with 10 labs and four types of component. Its findings will be summarized. A second experiment was conducted with one part, one operator and different equipment. Finally, a third experiment looked at changing different parameters of the test set up too see if the results would be impacted.
The tutorial will summarize the important differences between the HMM standard practice and the IEC 61000-4-2 and will reiterate the care that must be taken when testing components to a system level test.

DD140: ESD Device Testing Standards Overview

Course Length: 3 Hours

The introduction of the Device Design Certification curriculum has created a need for an additional class that will help with the understanding of Device Testing (DT) standards. Not all aspects of the existing DT standards are covered in tutorials. This new Standards Device Testing (DT) tutorial provides an overview of the Device Testing Standards (S) and Standards Test Methods (STM) and Standard Practice (SP) documents. The new class will be different from the existing DT –HBM, MM, CDM, TLP Component level class in that the Component class covers why the testing is done, explains the technical differences between the ESD models etc . The new class will cover overall requirements, specifications, equipment calibration, verification, qualification for the above standards. The course will also cover the testing setup , the testing procedure, the testing requirements and application for each of these DT documents.

DD155/FC155: ESD Control Workstations: Set-up, Practical Considerations and Measurements

Course Length: 3 hours

The complexity of properly installing workstations is often underestimated, On the ‘surface’ it appears to be a simple installation of an ESD static dissipative mat or ESD hard laminate. However, there are important issues learned from years of experience that impact cost, durability, ESD performance, maintenance and complain verification. A good ESD control workstation is the cornerstone of ESD Program Management (EPM). Workstations used in processing ESD susceptible items are intended to maintain a near zero potential by providing ground paths for basic components of the workstation and a connection point for personnel grounding apparatus. The workstation should provide protection from CDM (Charged Device Model) ESD as well as HBM (Human Body Model). This practical tutorial will teach you how to set-up an effective ESD controlled workstation that accomplishes these goals. It will cover selection and qualification of the required materials and how to install them correctly. Other workstation issues will be discussed including: application of ionization, garment grounding, ESD chairs, handling containers, tools and compliance verification consistent with ESD TR53.

DD200: Charged Device Model Phenomena, Design and Modeling

Course Length: 3 Hours

Certification: DD

This course teaches basic ESD circuit design concepts and ideas required to design ESD protection for charge device model (CDM) ESD tests. The course covers a brief history of CDM ESD development, charge and discharge physics, characterization methods, CDM failures mechanisms, and CDM design-in strategies.

CDM ESD circuit design approaches and simulation setups for CDM failure debugging are presented in this tutorial on the basis of case studies. Insight into CDM circuit simulation requirements and physical aspects of the CDM ESD phenomenon that are important for reproducing the event with circuit simulation will be taught and modeling approaches for CDM specific device physical effects necessary for accurate circuit simulation will be introduced. This course also teaches methods for simplified CDM circuit simulations where detailed information is either not available or too complex to simulate.

The course focuses on what type of circuits fail during a CDM discharge event and teaches the different types of ESD design circuit strategies that can be applied to protect those circuits. This class covers basic to advanced topics for CDM ESD design, but the student is assumed to already have a basic understanding of the CDM test method.

DD201: ESD Protection and I/O Design

Preview

Course Length: 3 Hours

This tutorial is intended to provide the attendees with the tools to take a device and circuit level understanding of ESD protection methods and implement them effectively in I/O designs for CMOS bulk technologies. Beginning with a review of common ESD protection strategies, this course will focus more directly on how to build ESD-robust I/O cells and how to integrate them on a full chip. The tutorial will cover various types of I/O pads including analog, RF and digital pads. Different types of ESD protection strategies and their usage in I/O pad cells will be described, for example rail clamp, self-contained, and SCR based protection schemes. This course will also discuss the decisions and challenges which ESD and I/O designers typically face when designing I/O pads. More complex ESD solutions will also be described such as stacked rail clamps, ghost rails, and protecting signals that can swing below ground or above the supply. Finally, this tutorial will touch on various supply schemes including multiple power domains and isolated grounding schemes. It will end with discussing pad ring construction aspects for both wire-bond and flip-chip packages.

DD203: Designing ESD protection for RF and mmWave CMOS circuits

Course Length: 1.5 Hours

Providing ESD protection for high performance RF and mmWave circuits is a very challenging task where both the expertise of a skilled RF designer and ESD designer need to be combined. This course will introduce the challenges and solutions for providing ESD protection for both narrow and wideband RF and mmWave circuits. The tutorial will not only discuss ESD devices used in RF applications, but also explore their use in RF circuit demonstrators. Next to the ESD techniques, RF design techniques and tools will be introduced to ESD designers. The audience will be able to understand the challenges from both RF and ESD point of view. They will have a clear overview of the solutions that are available in the public domain, and will get experience based on real design examples that will be discussed during the course. The tutorial will not be limited to ESD device design for RF, but will be more focused on how to use the components in a real RF design integration flow.

DD204: ESD Design in HV Technologies

Course Length: 1.5 hours

This seminar gives an introduction to ESD design in high voltage technologies for integrated circuits with pin voltages from 12V upwards. After a short introduction of typical applications and requirements, an overview of different technologies and the typical device portfolios in these technologies will be given. Different ESD protection concepts are introduced, analyzing advantages and disadvantages of the various possible approaches to implement ESD networks (diodes, snapback devices, active clamps…). Finally, HV-technology and design related challenges regarding ESD protection are discussed, with a special focus on the formation on parasitic bipolar devices and their impact on the circuit’s ESD performance. The attendee will gain a good basic knowledge of the main characteristics of HV technologies, the different ESD protection concepts and ESD protection challenges that are specific for HV technologies. This will be a help for understanding and further development of HV ESD protection. An extensive literature list is provided for further study of various subjects regarding HV ESD.

DD209: Sensitivity of MEMS to EOS/ESD Phenomena

Course Length: 1.5 Hours

This tutorial addresses the important issues that EOS/ESD phenomena could cause on Micro Electro Mechanical Systems (MEMS). It will start with an overview on what MEMS are and the required theoretical background, up to showing simulated and experimental results, and practical design tips to improve device reliability. Theoretical basis will help to understand the main problems of micromachined devices: dielectric breakdown, charge trapping, stiction problems, etc. Electrostatically actuated MEMS for radio frequency applications will be analyzed in detail, but the results will be extended also to different devices with other actuation mechanisms (magnetic, thermal, piezo, etc…). Finite-Element-Method (FEM) and Electro-Magnetic (EM) simulations will be introduced through some examples with the aim of investigating more in detail the impact of EOS/ESD events on the device behavior. Experimental results will cover a significant part of the tutorial, in order to show real failures induced by EOS/ESD events, trying to remove misconceptions, and suggesting realistic protections from the design stage, up to the PCB assembling, always considering the problems and limitation typical of RF applications. The testing of MEMS devices will be analyzed, showing state-of-art setups ad-hoc developed for MEMS & ESD characterization, and analyzing the main differences from traditional solid-state devices testing. Finally, the most common measurement artifacts encountered during the testing of the sensitivity of MEMS devices to EOS/ESD phenomena will be shown. It will be discussed how it is possible to accelerate degradation modes and mechanisms of MEMS through the application of controlled ESD-like phenomena.

DD210: ESD On-Chip Protection in Advanced Technologies

Course Length: 3 Hours

Certification: DD

This tutorial addresses important issues in the design of IC protection circuits built with advanced deep sub-micron CMOS technologies, including silicon-on-insulator (SOI) and high voltage MOSFETs. The tutorial will present fundamental aspects of ESD protection design such as basic NMOS and SCR concepts, as well as gate-biased and substrate driven NMOS protection concepts. Protection design methods to meet the human body model (HBM), machine model (MM), and charged device model (CDM) will be presented. Other topics to be covered include BiCMOS protection circuits, mixed voltage protection, and compatibility to latch-up. Specific design examples will be presented to assist in understanding the methods for design synthesis. This tutorial is useful for design, device, process, product, failure analysis, and reliability engineers and will assist those attending other design related tutorials. Attendees should have a minimum knowledge of MOS device operation in integrated circuits.

DD211: EOS/ESD Failure Models and Mechanisms

Preview

Course Length: 1.5 Hours

Certification: DD

ESD and EOS failures continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This tutorial studies electrical overstress, ESD, and latch-up from a failure analysis and case-study approach. It provides insight into the physics of failure, followed by investigation of failure mechanisms in specific technologies, circuits, and systems. The tutorial covers both the failure mechanism and the practical solutions to fix the problem from either a technology or circuit methodology.

The failure of each key element of a technology from passives, active elements to the circuit, sub-system to package, highlighted by case studies of the elements, and circuits and system-on-chip (SOC) in today’s products.

DD213: ESD, EOS and Latch-up Failure Analysis for Designers

Course Length: 1.5 Hours

This tutorial will introduce the student to the field of failure analysis as it is performed on ESD, EOS, and Latch-up failures. This tutorial is not trying to make the student into a Failure Analyst. This takes 3-5 years of mentoring to cultivate. The emphasis will be on understanding the diagnostic process and applying the correct set of tools to the failure with the ultimate goal of determining a corrective action to improve the product’s robustness to these stresses. Examples will range from discrete clamp debug to FA on a complex circuit. FA combines the skill set of a detective, designer, and device physicist to understand what has happened to cause failure.

DD220: Transmission Line Pulse (TLP) Basics and Applications

Preview

Course Length: 3 Hours

Certification: DD

This tutorial will cover the basics of TLP including underlying theory, the types of TLP systems available and how I-V curves are extracted from TLP pulses. The tutorial uses examples to show how fundamental device parameters can be measured with TLP. These parameters allow the ESD engineer to understand a technology’s properties which can be used to design successful ESD protection circuits. The student will gain an understanding of the purpose of TLP measurements, how TLP relates to HBM and CDM, fundamentals of how TLP systems work including impedance and reflections, types of TLP systems, importance of load lines, adaptive ranging, TLP calibration, time dependence from TLP, and biased TLP measurements. The tutorial will present examples of TLP use for nMOS transistors, diodes, oxides/capacitors, power supply clamps, as well as time dependent TDR-O and VF-TLP examples.

DD221/FC221: Waveforms and the Safe Handling of Devices

Preview

Course Length: 3 Hours

Nearly all integrated circuits are stressed according to the “classical” device testing models Human Body Model (HBM) and the Charged Device Model (CDM) during qualification with a defined current pulse in order to guarantee safe handling in an electrostatic-protected area.  In manufacturing environment, electrostatic voltages are measured on operators, devices, boards or systems. The tutorial will present examples for charging and discharging in typical manufacturing environment based on real world case studies and discuss the question how those “real-world” ESD events correlate to the threshold values obtained in device qualification tests.  Field problems that cannot be reproduced by the classical device testing models and appropriate test methods conclude the tutorial. Understand the ideas of the basic ESD qualification models HBM, Machine Model (MM), and CDM. Learn typical failure modes and understand which waveform parameters of the models are decisive for the failure modes. Learn some basic measurement methodologies of charging/discharging in a manufacturing environment. Get familiar with the waveform of typical “real-world” ESD events and understand how to assess the waveform with respect to the device qualification tests.

DD222: Practical Aspects of Latch-Up for Low Voltage CMOS: Design Rules, Layout Floor Planning, and Test

Course Length: 1.5 Hours

The idea of this tutorial would be to tackle the practical aspects of designing and testing for latch-up robustness. From a design perspective, layout floor-planning, design rules, and EDA checks will be covered. From a test perspective, standard DC latch-up testing as well as transient latch-up testing (including system-level ESD, cable discharge, and the evolving transient latch-up standard) will be covered. Finally, real world latch-up failures and diagnoses will be presented.

DD231: Integrated ESD Device and Board Level Design

Preview

Course Length: 3 Hours

Efficient ESD design for system level ESD can only be achieved if board and device level protection circuitry coincide. The purpose of this tutorial is to develop an understanding of board/IC interaction under IEC 61000-4-2 testing conditions and to discuss useful design strategies supported by appropriate tools. This is meant to be beneficial both for ESD engineers of ICs and board designers responsible for EMC/ESD compliant design of the system.

While it has clearly been pointed out that even elevated IC level HBM targets are insufficient for achieving the required IEC 61000-4-2 ESD level, more awareness has to be developed for the detailed turn-on and clamping behavior of IC level and board level ESD protection components. High current characterization of board protection and IO circuit by TLP is a first step. This enables the board designer to assess the behavior of IC pins and select appropriate board protection elements. The design optimization should be based on high current models of board components and IC IOs and the numerical simulation of the protection network under ESD conditions. Finally, various test methods are available to evaluate the efficiency of implemented protection on board level quantitatively.

DD240 ESD Device Qualification Testing

Course Length: 3 Hours

This tutorial addresses the details of both Human Body Model (HBM) and Charged Device Model (CDM) qualification testing. This course will help in interpretation of the HBM joint standard JEDEC/ANSI/ESD JS-001-2014 including the following details: Waveform verification, understanding of Table 2A (minimum required set of pin combinations) and Table 2B (legacy pin combinations), pin categorization and pin grouping, I/O pin sampling, stress plans details including efficient testing (reduction in pin count) and some debugging options. In addition, this course will discuss CDM testing details regarding waveform verification, stress plans, peak current (Ipeak) variability and how does it affect the testing results, and debugging options as well as an overview on the new CDM joint standard JEDEC/ANSI/ESD JS-002-2014.

DD300: Circuit Modeling and Simulation of On-Chip Protection

Preview

Course Length: 3 Hours

Certification: DD

This tutorial addresses modeling and simulation of protection circuit elements and networks under ESD conditions. The high-current characteristics and transient responses of devices typically used in ESD protection circuits will be presented. The objective is to ascertain what behaviors have to be captured in models intended for circuit-level simulation of ESD. Specific examples of model implementations will be provided. Parameter extraction and model scalability will be addressed. Thermal modeling will be discussed, as will be the issue of modeling the off-state behavior of ESD protection devices. This tutorial assumes some familiarity with device physics. It is directed toward persons with an interest in the transistor-level physics of ESD in on-chip protection circuits and an interest in computer-aided design.

DD301: SPICE-Based ESD Protection Design Utilizing Diodes and Active MOSFET Rail Clamp Circuits

Preview

Course Length: 3 Hours

Certification: DD

I/O ESD protection networks comprising dual diodes to the power/ground rails and networks of RC triggered active MOSFET rail clamp circuits have become prevalent in the industry for low voltage CMOS (<5 volt) process technologies. These networks have become popular because they offer clear advantages over prior ESD solutions in terms of fab portability, scalability, layout area, and ease of compact modeling for circuit simulations in SPICE.  In this tutorial, we will explore in turn each of the key elements in active ESD networks including diodes, active clamp devices, and trigger circuits. We will cover in detail the important role that power rail resistance plays in determining the optimum size and placement of clamps in a protected bank of I/Os. We will review approaches for ESD-hardening of I/Os with more robust output driver configurations and secondary input protection circuits. Next, a step-by-step methodology for SPICE-based ESD network design and optimization will be introduced. Examples of this design methodology will be shown for both a “kit-based” and “full-custom” design approach. Finally, depending on time available, we will review a range of special topics including advantages in using isolated PWELL in ESD designs, HV and HV-tolerant network designs, and ESD networks for SOI technologies.

DD302: Troubleshooting On-Chip ESD Failures

Preview

Course Length: 3 Hours

Certification: DD

Diagnosing and fixing on-chip ESD product qualification failures can often be one of the more challenging aspects of work in ESD.  The pressure to quickly find and correct an HBM/MM/CDM failure in order to qualify a product often compounds the inherent difficulty of troubleshooting. Experience diagnosing failures, though not desirable from a product qualification standpoint, can greatly improve troubleshooting skills. This tutorial will build troubleshooting experience and skills by presenting case studies of actual on-chip HBM failures in a workshop format. The evidence for each case will be revealed and the failure analyzed in the same manner as an actual failure. Participants will be led through and allowed to analyze each failure case, interacting with the instructor to determine its root cause and a solution. This tutorial will identify common concepts, methods, and tools useful in failure diagnosis.  Participants should be familiar with CMOS technology, on-chip ESD breakdown phenomena, standard ESD protection circuits, and the HBM test procedure. Participants should also be acquainted with basic CMOS circuit design, should be able to read circuit diagrams, and should have a basic understanding of the function of IO circuits.

DD311: Impact of Technology Scaling on Components High Current Phenomena and Implications for Robust ESD Design

Preview

Course Length: 3 Hours

Certification: DD

This advanced tutorial will focus on high-current behavior of stand-alone components, with the aim of optimizing effectiveness of ESD clamp devices (irrespectively of their schematic implementation) and maximizing the ESD SOA (Safe Operating Area). Components in both Analog and Digital technologies will be discussed, with emphasis on technology trends. This class is intended for individuals who have taken the basic on-chip protection class and are familiar with the basic device physics for both ESD and latch-up.

DD318: FinFET and Advanced CMOS Technology ESD TCAD Simulations

Course Length: 1.5 Hours

This tutorial will give an introduction to the fundamentals of TCAD. To this end, we will go over every step needed to obtain simulated I-V characteristics of an instructive technology (e.g., 45-nm planar silicon) and an advanced platform (14-nm Si finFET).

Topics include:

  • Process simulations covering the various etch, deposition, cmp, implant, and anneal steps
  • Electrical simulations on the created structure, showing the reaction of the structure to external stimuli
  • Fundamentals of mixed-mode simulations l-V

DD319: Physical Process, Device and Circuit Simulation (TCAD) Methodologies in Application to Industrial ESD Research and Design

Preview

Course Length: 3 Hours

Over last two decades numerical simulation with commercially available Technology CAD (TCAD) tools has being widely applied across industry and research organizations to address ESD protection design challenges, ESD solutions development, test chip design and validation of the device, clamp circuits and application circuit blocks as well as interpretation of the Failure Analysis results. Corresponding significant and diverse material has been accumulated in the literature and unpublished industry practices. At the same time the best practices and methodologies were not adequately summarized to bring them to the broad audience in easily accessible and practically usable way. As a result, they are way underused today.

The purpose of this tutorial is provide a comprehensive structured review of the published ESD TCAD results and construct a step-by-step approach to successful methodology and best practices application. The presented material achieves this goal in several steps: (i) by means of review and classification of the most relevant studies where the ESD problems which have been addressed through TCAD simulation; (ii) by derivation of a generic physical simulation workflow based upon either process simulation or parameterized device definition followed by device simulation and mixed-mode analysis in ESD time domain; (iii) by outlining and classification of the major application physical ESD problems which can be addressed through 2D or 3D TCAD analysis. The presentation material in the tutorial is supported by numerous easy-to-understand simulation examples.

With fabless and fab-light trends dominating in the semiconductor industry in recent years, one of the main focus points of the tutorial is overcoming the requirements of well calibrated process simulation flow for successful application of the TCAD methodologies. This is done by demonstrating the classes of problems and solutions that can be addressed in this environment. Another focal point of this tutorial is to demonstrate the mixed-mode simulation approach capability including device and circuit parameterization and automation.

The tutorial is not linked to any specific TCAD tool set and is equally useful to the users with experience using TCAD tools from any vendor or to the ESD engineers providing problem statement input for TCAD engineers. The material is presented using physical problem statements and solutions to illustrate the efficiency of methodology for ESD practitioners and device engineers. The material is presented hierarchically on the levels of ESD device physics, clamps and product circuit sub blocks including study of possible latch-up scenarios.

DD322: Advanced Latch-up Testing, Failure Analysis and Prevention by Design Constraints and Tools

Course Length: 1.5 Hours

This tutorial will cover:

  • The status of available standards and testing to them
  • Testing with improved setups with the DUT in correct state
  • Monitoring important nodes to ensure correct setup
  • Failure analysis methods
  • Understanding the failure mode
  • Design/layout prevention contraints
  • EDA check tools/Review

DD380/FC380: Electrostatic Calculations for the Program Manager and the ESD Engineer

Available Online

Course Length: 3 Hours

Certification: PrM, iNARTE

This tutorial focuses on the basic calculations and techniques of use to the program manager and the ESD engineer. The content is at the introductory college pre-calculus and introductory college physics level set in the context of electrostatic discharge and its effects. It is suggested that the student gain some familiarity with these subjects prior to the tutorial. Topics covered include the electric force, the electric field and Coulombs law, electric potential, and voltage. Gauss’ Law is discussed as it relates to the electric field, induction, and the Faraday cup. The capacitance in Q = CV is used to explain charge sharing. RC decay is discussed as it relates to ESD discharge from humans, devices, wrist straps, and materials. After completing this course, the attendee should leave with a proper understanding of the differences among the calculations for peak current, power, energy, and threshold voltage for a simple device.

DD381: Electronic Design Automation (EDA) Solutions for ESD

Preview

Course Length: 1.5 Hours

The verification of ESD protection networks in modern integrated circuits is a difficult challenge due to increasing design and process complexity, higher pin-counts and the overall computational difficulties in dealing with large data sets. Most chips today are segmented into multiple power domains, where ESD currents must necessarily be shunted from one domain to another; across multiple-layer interconnect paths that span major portions of the chip. Furthermore, circuit blocks that are traditionally not associated with the I/O ring and which may be far from the I/O circuits themselves,  may become damaged as a result of the high voltages and currents produced during an ESD discharge. Relying on manual verification alone poses a significant risk of missing hidden ESD pitfalls. Consequently, automated ESD and latch-up rule checking is highly desired. An optimum verification flow should provide broad and flexible design rule coverage and allow incremental verification as a design progresses to avoid late-stage changes just before tape out. The integration of ESD checking tools into the standard design flow allows these rules to be used directly by IC designers to identify and correct most ESD issues prior to meeting with the ESD experts. This tutorial will outline the essential requirements of the ESD electronic design automation (EDA) verification flow which would be aligned within the IC design community, as discussed in the recently released ESDA Technical Report TR18.0-01-11 (ESD Electronic Design Automation Checks). The tutorial will give an overview of existing ESD EDA solutions across industry, including both commercial and in-house EDA tools and flows for automated ESD checks and will discuss directions for future ESD EDA tool development.

DD382: Electronic Design Automation (EDA) Solutions for Latch-up

Course Length: 1.5 Hours

The verification of latch-up protection networks in modern integrated circuits is a difficult challenge. There are several factors including increasing design and process complexity, higher-pin counts and the overall computational difficulties in dealing with large data sets. Traditional latch-up geometrical rule checks using DRC tools can only provide limited verification. These checks are typically focused on layout topology. However electrical information for latch-up risk areas throughout the chip is not readily available. While DRC checks are still useful at early design stages, relying on conventional DRC latch-up checking exclusively, poses a significant risk of missing hidden latch-up pitfalls. Consequently, a fully automated latch-up rule checking approach analyzing electrical information is highly desired.

In this tutorial we will review a typical latch-up prevention flow. Then the dual DRC and Calibre PERC-based latch-up verification flow will be shown. We will then provide an example of identifying latch-up injectors and describe how this information could be used in both a DRC and Calibre PERC based verification flows. Afterwards the tutorial will introduce the concept of context based checking as it applies to latch-up spacing checks. An example of validating latch-up prevention techniques for the devices in grounded nwell will be shown along with additional latch-up verification case studies related to guard rings and well ties. 

ESD Device Design Essentials

This two-day seminar consists of concentrated versions of twelve ESDA tutorials which comprise the ESDA Device Design Certification Program.

  • ESD On-Chip Protection in Advanced Technologies
  • SPICE-Based ESD Protection Design Utilizing Diodes and Active MOSFET Rail Clamp Circuits
  • EOS/ESD Failure Models and Mechanisms
  • On-Chip ESD Protection in RF Technologies
  • Charged Device Model Phenomena and Design
  • Latch-up Physics and Design
  • Circuit Modeling and Simulation for On-Chip Protection
  • Troubleshooting On-Chip ESD Failures
  • Device Testing--IC Component Level: HBM, CDM, MM, and TLP
  • Impact of Technology Scaling on ESD High Current Phenomena and Implications for Robust ESD Design
  • Transmission Line Pulse Measurements: Parametric Analyzer for ESD On-Chip Protection
  • System Level ESD/EMI: Testing to IEC and other Standards

Factory Control

Click on title for course abstract.

FC100: ESD Basics for the Program Manager-

Course Length: 6 Hours

Certification: PrM

This tutorial provides the foundation material for understanding electrostatics and ESD and their role in the manufacturing and handling of ESD sensitive devices. The fundamental properties of charge, electric fields, voltage, capacitance, and current are discussed with a view towards understanding key electrostatic phenomena and electrical processes. These include charge generation and decay, material properties, and induction. An overview of device failure mechanisms is presented, including how these models impact ESD control programs. Finally, the course provides an overview of ESD control procedures during handling and manufacturing and an overview of ANSI/ESD S20.20 program requirements. This full day course is required for those in-plant auditors and program managers who are working toward professional ESD certification. The presentation includes many in-class demonstrations, videos, and animated slides.

Some sample topics covered in this course are:

  • Definitions and relationships among important electrical and mechanical properties
  • Causes of charge generation and decay
  • Field effects and voltages
  • Role of capacitance in ESD (Q=CV)
  • Overview of key measurements including common pitfalls of some measurements
  • Review of ESD failure models
  • Understanding and demonstrating electrostatic induction
  • Utility and limitations of air ionization
  • Basic goals of ESD controls
  • Properties of effective ESD control products and materials
  • Overview of ANSI/ESD S20.20 ESD program development requirements

FC101: How To's of In-Plant ESD Auditing and Evaluation Measurements

Preview

Course Length: 6 Hours

Certification: PrM

This program reviews the evaluation and periodic verification (audit) measurement procedures for the technical requirements specified in the ANSI/ESD S20.20 ESD program development standard. Detailed explanation of instruments, fixtures, and accessories function and usage are provided. Then, the details of “How to” measure are explained and demonstrated. Measurements include those listed in Table 1: Grounding/Equipotential Bonding Requirements; Table 2: Personnel Grounding Requirements; and Table 3: EPA/ESD Control Items. These recommended measurement procedures confirm the proper operation and use of ESD control products and materials selected as part of a facility’s S20.20 ESD control program.

Some sample topics covered in this course are:

  • ANSI/ESD S20.20 Technical Control Requirements
  • Program Manager’s Approach to Instrumentation and Applications
  • Testing Ground Circuits and Assessing Connections
  • Essential Resistance Measurement Procedures and Concerns
  • Electrostatic Field and Voltage Measurements
  • Personnel Grounding Considerations vs. ESD Control Points
  • Product Installation Baseline Measurements
  • Evaluation, Acceptance, and Audit Procedures for: Ground Systems, Floors, Worksurfaces, Equipment, Personnel Grounding, Garments, Materials, Production Aids, Packaging, and Ionization Devices
  • Electrostatic Analysis Measurements including Worksurface Suppression, Footwear/Flooring, and Ionization Decay

FC110: Cleanroom Considerations for the Program Manager

Available Online

Course Length: 3 Hours

Certification: PrM

Cleanrooms and clean environments are enabling technologies required for the manufacture of many products that have exacting contamination control requirements in order to achieve defined yield and reliability targets. Clean manufacture is required in the semiconductor, hard disk drive, flat panel display, and pharmaceutical industries, to name a few. Requirements of cleanroom/clean environments and tooling therein result in low humidity levels, low surface contamination levels, use of process-required insulators, and a lack of natural ions in the controlled environment. These factors can contribute to development of elevated static charge levels in close proximity to sensitive product, presenting both a contamination and electrostatic discharge exposure.

This tutorial will provide a detailed review of the following concepts:

  • Cleanroom/clean environment function
  • Airborne particle classification standards
  • Cleanroom compliance monitoring test methodologies
  • Electrostatic attraction relation to airborne and surface contamination
  • Electrostatic discharge concerns
  • Cleanroom static charge generation challenges and control methodologies
  • In addition, several case studies of static charge control issues in clean environments will be presented

FC115: Contamination & ESD Issues in Flat Panel Display Manufacturing Process

Preview

Course Length: 3 Hours

Most of ESDA’s tutorials were formed for semiconductor technology based protection circuit design and control programs for factory management. But FPD using glass and thin film sheet materials which are highly insulative materials and not available to discharge with touch ground procedures. FPD manufacturing processes have fast growing concerns with static related problems such as particle contamination issues, which are getting smaller and ESD damages on TFT panel structures. These two major issues are happening in one place which is different from semiconductor case. In case of semiconductor fab, they care very much about particles not strongly related with ESD. Also, ESD is a typical issue in back-end semiconductor assemblies and electronic parts manufacturing processes such as printed circuit board assemblies. But, FPD manufacturing processes have both problems throughout their processes and this tutorial provides how to approach static problems in FPD applications.

This tutorial will help demonstrate why conductor based general ESD control countermeasures aren’t working in FPD processes and limited effective for ESD and contamination controls. This will offer correct understandings and provide insights of different strategies for FPD processes, including accurate & alternative measurement, in-depth analysis, and countermeasures.

FC120: Ionization Issues and Answers for the Program Manager

Available Online

Course Length: 3 Hours

Certification: PrM

The first principle of ESD control is to bond all conductors together, preferably to ground. This technique works well for stationary conductive objects, but how do we control electrostatic charges on process essential insulators or conductive objects that cannot be grounded? This tutorial will explore the fundamental ESD control principles surrounding the use of ionization systems in an ESD control program plan. We will explore the benefits of ionization; discuss the different technology types and the pros and cons of each. Examples will be given demonstrating when and where ionization should be used, as well as how to measure ionizer performance. The criteria surrounding installation, safety, maintenance, and contamination concerns will be reviewed. Upon completion, you will be familiar with standardized product qualification, acceptance testing and compliance verification test methods and practices.

DD122/FC122: Use of the Digital Sampling Oscilloscope for ESD Measurements

Course Length: 3 Hours

The digital sampling oscilloscope (DSO) finds application in measuring waveforms that occur infrequently or only once. Its sophisticated calculation and display capabilities give it utility for factory ESD, as well as, its role in monitoring ESD immunity waveforms for both component and system level ESD.Understanding instrument performance issues is important for proper use. DSO bandwidth and the sampling rate are often used interchangeably, although they serve completely different purposes. The bandwidth, sampling rate and memory depth of the instrument must be specified for the intended application. DSOs also have display modes which can hide undersampling artifacts and lead to incorrect conclusions. Selecting the appropriate display algorithm is important for both cosmetic purposes and to achieve correct results from the instrument. Also important for the proper use of any oscilloscope are selection of the input impedance and the setup of the trigger. For a DSO, the pretrigger value must also be set. In some cases equivalent time sampling can be used but in most ESD measurements, single shot acquisition is required. Finally, for ESD applications on the factory floor, there are a variety of probes that are used. These include, wide bandwidth current probes, clamp on current probes, single ended and differential voltage probes, as well as, high frequency antennas.

DD130/FC130: System Level ESD/EMI: Testing to IEC and other Standards

Available Online

Course Length: 3 Hours

Certification: PrM, DD

This tutorial is intended to help those tasked with testing products to IEC and other system level ESD standards by providing detailed information on IEC 61000-4-2, the most widely used standard, and highlighting the harmonization and differences among IEC, ANSI, Telcordia, and some automotive ESD standards. We will answer common questions regarding test set-ups, test points, and procedures, and address key issues, including: 1) Differences between "verification" and "calibration" and when is each required; the influence of ESDA WG14 technical report (TR) on IEC and how it affects the calibration and verification procedures. 2) Test set-up requirements, the test environment, ground connections, and return paths and ground plane effects. 3) Testing procedures with demonstration on actual products, how the tester affects test results, and problems with test result variations due to simulator influences. 4) What points need to be tested and why, guidance on determining "operator accessible" points and ports, exempted points and ports, and what to do around connectors and connector pins. 5) ANSI and other ESD standards, the drive toward harmonization with IEC, why standards will probably never be the same as IEC, and the scope of different standards. This system level ESD tutorial will cover several facets of ESD as applied to electronic systems.

DD230/FC230: System Level ESD/EMI (Principles, Design Troubleshooting, & Demonstrations)

Preview

Course Length: 3 Hours

This system level ESD tutorial will cover several facets of ESD as applied to electronic systems. Many of the principles and troubleshooting techniques will be demonstrated on real circuits for the students, with several new experiments added since previous years. “War” stories will also be used to illustrate points. The emphasis will be on making the experience both entertaining and informative for the students using an intuitive approach without heavy mathematics. Topics covered will include 1) Characteristics of ESD events; 2) ESD principles as applied to electronic systems; 3) Design troubleshooting techniques; 4) Unusual forms of ESD that have been the cause of field failures including internal chair discharges; 5) High-frequency measurement techniques; and 6) System design principles. It is recommended that those attending this tutorial section have at least one year of a college level electronics circuits course. Knowledge of common circuit analysis techniques will be assumed.

FC100: ESD Basics for the Program Manager

Course Length: 3 Hours

Certification: PrM

This tutorial provides the foundation material for understanding electrostatics and ESD and their role in the manufacturing and handling of ESD sensitive devices. The fundamental properties of charge, electric fields, voltage, capacitance, and current are discussed with a view towards understanding key electrostatic phenomena and electrical processes. These include charge generation and decay, material properties, and induction. An overview of device failure mechanisms is presented, including how these models impact ESD control programs. Finally, the course provides an overview of ESD control procedures during handling and manufacturing and an overview of ANSI/ESD S20.20 program requirements. This full day course is required for those in-plant auditors and program managers who are working toward professional ESD certification. The presentation includes many in-class demonstrations, videos, and animated slides.

Some sample topics covered in this course are:

  • Definitions and relationships among important electrical and mechanical properties
  • Causes of charge generation and decay
  • Field effects and voltages
  • Role of capacitance in ESD (Q=CV)
  • Overview of key measurements including common pitfalls of some measurements
  • Review of ESD failure models
  • Understanding and demonstrating electrostatic induction
  • Utility and limitations of air ionization
  • Basic goals of ESD controls
  • Properties of effective ESD control products and materials
  • Overview of ANSI/ESD S20.20 ESD program development requirements

FC150: Hands-on ESD Measurements & Instruments-Uses and Pitfalls

Preview

Course Length: 3 Hours

Accurate data is the foundation of effective ESD program management. This hands-on tutorial will explain and demonstrate the proper use of ESD test equipment such as static locators, resistance meters, charge plate monitors, and event detectors. We will examine pitfalls of using these common instruments that can result in an incorrect representation of the ESD risk. For example, static locators can give misleading readings if the effects of voltage suppression are not taken into account. We will also discuss the effective use of ionization since ionizers that are not measured, maintained, and located correctly may contribute ESD hazards to the work area. Each student will participate in class exercises to perform these tests. The hands-on experience is the best way to understand the seriousness of the pitfalls and the benefits to taking the proper precautions. What you learn will help you avoid frequent auditing problems and improve your compliance verification program.

DD155/FC155: ESD Control Workstations: Set-up, Practical Considerations and Measurements

Course Length: 3 Hours

The complexity of properly installing workstations is often underestimated, On the ‘surface’ it appears to be a simple installation of an ESD static dissipative mat or ESD hard laminate. However, there are important issues learned from years of experience that impact cost, durability, ESD performance, maintenance and complain verification. A good ESD control workstation is the cornerstone of ESD Program Management (EPM). Workstations used in processing ESD susceptible items are intended to maintain a near zero potential by providing ground paths for basic components of the workstation and a connection point for personnel grounding apparatus. The workstation should provide protection from CDM (Charged Device Model) ESD as well as HBM (Human Body Model). This practical tutorial will teach you how to set-up an effective ESD controlled workstation that accomplishes these goals. It will cover selection and qualification of the required materials and how to install them correctly. Other workstation issues will be discussed including: application of ionization, garment grounding, ESD chairs, handling containers, tools and compliance verification consistent with ESD TR53.

FC160: Triboelectrification - Theory and Applications

Course Length: 3 Hours

Triboelectrification refers to the process whereby two materials become charged after contact and separation. It is one of the prime charge generation processes involved in electrostatic discharge (ESD) events. This tutorial reviews the theory of triboelectrification, its measurement and control. Work function theory is used to predict the polarity of the charge exchange during contact; the nature of the surfaces, the effective contact area and environmental conditions affect the net charge after separation. Techniques for measuring the charging characteristics of materials are presented and the results of tests to study the effect of temperature and humidity provided. Methods to limit charge levels by the control of generation and dissipation processes are discussed. A brief review of some of the beneficial applications of triboelectrification such as electrostatic painting, xerography and material separation is also included.

FC161: Perfect ESD Storm

Course Length: 1.5 Hours

Learn how to prepare for the "Perfect ESD Storm" that is brewing in the electronics industry. The trend towards extensive use of ultra-sensitive components (Class 0) and the widespread lack of CDM (Charged Device Model) understanding are brewing the "Perfect ESD Storm." It is no longer business as usual, and it can take up to two years to prepare. This tutorial is intended for professionals who have a basic understanding of ESD but are not fully aware of CDM control techniques or the industry trend toward extremely sensitive devices and the counter measures that are necessary. Learn the answers to your questions as well as these examples. Are you skeptical about this news of a Class 0 trend? Is it really happening? Is it likely to be a problem in your factory? How big a problem is CDM in manufacturing? What is different about CDM controls? How do I tailor Ansi/ESD S20.20 for CDM and Class 0? Join us for this highly interactive tutorial and learn why this is inevitable and how to prepare for it.

FC163: Automated Handling and Processes

Course Length: 1.5 Hours

This course will focus on the grounding and material requirements of ESD Controls in AHE for prevention of CDM and MM type damage to ESD sensitive devices. Design methods and material selections that provide effective ground paths through the assembly will be introduced. Test methods used to qualify the design will be discussed. Students will also become familiar with different types of plating and practices to provide effective designs. Topics Covered:

What were early AHE designed to with regards to ESD?
What Standards were used? How does CDM and MM pertain to AHE? How does CDM and MM occur in the automated equipment and how to prevent or minimize the effects?

2: Proper grounding has to be designed into the assembly; this section will describe proper design techniques and methods. I. Stationary assemblies II. Bearings and other rotating assemblies Other items such as lubricants are discussed that provide ground paths through various assemblies.

3. Proper Materials for applications: Should carbon filled Delrin be used or should carbon fiber filled ULTEM be used? Which plastic materials are shown to have better performance? Everything has drive belts and carrier belts, which should be used? Polycarbonates and Lexan, what can be done with these materials and what should be done at a minimum? Plating such as Chrome, Titanium Nitride, Black Chrome

4. Verification Measurements and recommended spec-ifications: Examples shown of measurements completed in the machine and why they are important. I. Resistance measurements, point to point and point to ground, tip to tip and more. II. Voltage measurements

FC164: Costly Controversial ESD Myths

Course Length: 3 Hours

There are a number of common misunderstandings and controversies about electrostatic discharge (ESD) program management that can have significant impact on the implementation and maintenance of the ESD program. These misunderstandings or “myths” result in unnecessary expenditures and/or result in a compromise of the program integrity. These myths and controversies, such as latency are often cited by skeptics not wanting to adhere to certain standard ESD procedures. As a consequence, it is important to identify and dispel the myths as well as to understand the potential impact of latent failures.

This tutorial highlights 10 common myths and supporting success studies as well as a success study on latency. The myths and success studies presented here were chosen to provide real-world examples of how an ESD program can be strengthened by understanding the fallacy in each of the myths. This understanding will result in more reliable products that are also more cost competitive. Although not a myth, latency it is a significant reliability consideration that is surrounded with controversy. Some experts will argue that latency is virtually non-existent and others will claim that it is the dominant failure mode. Reality lies somewhere in between. The Latency study cites irrefutable evidence of latent failures in alarming proportions that must be factored into ESD programs and product design.

FC165: Novel Methods for Fixing ESD Issues in the Factory for Both Electronics & Explosive Products

Course Length: 3

This class will be a 3-hour tutorial on ESD control for explosives and other energetic materials, introducing the students to the differences of ESD damage of electronics versus energetics. It will discuss the various energy levels and types of discharges which can cause catastrophic or latent failures. Enlightening demonstrations and case histories will be included to illustrate practical, real-life situations of past ESD-induced failures of energetic components and methods to prevent them, as well as explanations of the use of ESD mitigation in the work environment. Upon tutorial completion, the students should be able to understand ESD and the prevention of ESD failures be applying the proper mitigation & control techniques, as well as safely work with explosive applications while ensuring human safety, preventing catastrophic health hazards, injuries, and severe damages.

FC170: ESD Training for Internal Auditors and Supplier Quality Engineers

Course Length: 6 Hours

This class has been designed specifically for those individuals who are responsible for:

  • Performing internal company ESD assessments based on ANSI/ESD S20.20
  • Conducting a pre-assessment of their facility prior to an external 3rd party assessment
  • Assessing the ESD control programs of their suppliers

This course will use the checklist used by ESDA certified auditors as the basis for the class. However, this class will delve into the meaning behind each of the audit checklist questions in greater detail than is currently found in either the ESD Association registrar certification training or the ANSI/ESD S20.20 ESD program design seminar. After taking this class the student will be able assess a process and determine whether or not it meets the requirements of ANSI/ESD S20.20-2007.

Note: Familiarity with performing assessments is recommended for anyone planning on taking this course.

FC200: Packaging Principles for the Program Manager

Preview Available Online

Course Length: 3 Hours

Certification: PrM

Shipping electronic parts within a factory, to another factory, distributor, or to an end-user has always been an area of uncertainty within the manufacturing process. To provide clear-cut information on what type of controlled packaging should be used in any situation, the ESD Association released a comprehensive revision of the obsolete industry standard EIA 541-1988. The newer document, ANSI/ESD S541, is the focus of this inclusive session. It provides information and guidance, as well as material specifications, to assist in the design and implementation of a packaging plan for use within an ANSI/ESD S20.20 based ESD Control Program. Current and newly released test method standards suitable for packaging material evaluation will be described. Course credit applies to the ESD Program Manager Certification curriculum. Previous attendance at the "ESD Basics" and "How To's…" tutorials are highly recommended.

FC201: ESD - A Surprisingly Frequent Root Cause of Device Failure

Course Length: 3 Hours

While most companies are acutely aware of the hazards of ESD, few are aware of just how pervasive ESD failures actually are.  Likewise, many ESD Program Managers have difficulty securing adequate management support.   This tutorial will shed light on multiple sources of ESD damage and the circumstances where ESD failures dominate.   Recent studies into the misdiagnosis of EOS failures suggest that ESD damage may, in fact, occur much more often than previously realized – especially at the circuit board level.   This fact is a compelling justification for strong management support.   The student will also learn which are the most frequent ESD failure mechanisms among CDM, HBM and MM and why.   The student will also learn about the best practices for prevention for these recently recognized sources of ESD damage.

DD130/FC130: System Level ESD/EMI (Principles, Design Troubleshooting, & Demonstrations)

Course Length: 3 Hours

This system level ESD tutorial will cover several facets of ESD as applied to electronic systems. Many of the principles and troubleshooting techniques will be demonstrated on real circuits for the students, with several new experiments added since previous years. “War” stories will also be used to illustrate points. The emphasis will be on making the experience both entertaining and informative for the students using an intuitive approach without heavy mathematics. Topics covered will include 1) Characteristics of ESD events; 2) ESD principles as applied to electronic systems; 3) Design troubleshooting techniques; 4) Unusual forms of ESD that have been the cause of field failures including internal chair discharges; 5) High-frequency measurement techniques; and 6) System design principles. It is recommended that those attending this tutorial section have at least one year of a college level electronics circuits course. Knowledge of common circuit analysis techniques will be assumed.

FC210: ESD Standards Overview for the Program Manager

Preview Available Online

Course Length: 3 Hours

Certification: PrM

The ESD Association’s introduction of the Program Manager Certification curriculum has created a need to modify the Standards Tutorial that has been presented for a number of years, mainly to help individuals prepare for the iNARTE Engineering and Technician Exams. Currently, many of the ESDA Standards and Standard Test Methods are discussed in depth in the individual tutorials related to the specific subject matter. This Standards Tutorial provides an overview of all the Standards, grouped into common test types, based on measurement probe and test instruments. A common methodology is used in this tutorial to cover the requirements, applications and specifications for each Standard and Standard Test Method.

FC215: Device Technology and Failure Analysis Overview

Course Length: 3 Hours

Certification: PrM

This tutorial is designed to give a broad overview of ESD device technology, the many ways Circuit Designers protect against ESD, and the Failure Analysis (FA) techniques that are likely to be encountered in a report about ESD failures. This class is NOT intended to turn you into an ESD Protection Designer or an ESD Failure Analysis Engineer. It is meant for Program Managers; to give them background on what designers and FA engineers actually do, or for those users who want to have a broad, but not deep, understanding of those areas of the ESD world. After completing this tutorial you should be able to understand the basics of device ESD protection design and some of the trade-offs inherent in that process. You should also be familiar with some of the most commonly used failure analysis techniques that can help identify failing circuit components - in other words “what does a semiconductor manufacturer do with the units I return for failure analysis?” The topics covered include: the three most common ESD Models: HBM, CDM and MM; characteristics of ideal ESD protection; ESD failure analysis schemes; key characteristics of real ESD protection; failure analysis flow; failure analysis tools and their uses for ESD.

DD221/FC221: Waveforms and the Safe Handling of Devices

Course Length: 3 Hours

 

Nearly all integrated circuits are stressed according to the “classical” device testing models Human Body Model (HBM) and the Charged Device Model (CDM) during qualification with a defined current pulse in order to guarantee safe handling in an electrostatic-protected area.  In manufacturing environment, electrostatic voltages are measured on operators, devices, boards or systems. The tutorial will present examples for charging and discharging in typical manufacturing environment based on real world case studies and discuss the question how those “real-world” ESD events correlate to the threshold values obtained in device qualification tests.  Field problems that cannot be reproduced by the classical device testing models and appropriate test methods conclude the tutorial. Understand the ideas of the basic ESD qualification models HBM, Machine Model (MM), and CDM. Learn typical failure modes and understand which waveform parameters of the models are decisive for the failure modes. Learn some basic measurement methodologies of charging/discharging in a manufacturing environment. Get familiar with the waveform of typical “real-world” ESD events and understand how to assess the waveform with respect to the device qualification tests.

FC250: Automated Process Packaging Issues

Course Length: 1.5 Hours

Automated processes are designed to assemble items, such as printed circuit boards, quickly, efficiently, and accurately. There are many process design issues that one must consider when designing this type of process. Increased rework, decreased yield, and possibly decreased reliability, can be the consequence of processes issues that go wrong.  This tutorial looks at some of these pitfalls associated with packaging for automated processes and assemblies. Packaging for automated processes includes choices of various types and sizes of carrier tape for tape feeders and matrix trays of various materials and sizes.  Many of these issues are often overlooked or just unrecognized.  Demonstrations using special high speed videos will be seen of what does go wrong and some of the consequences to devices including interruptions in the process. Verification methods of the various packaging and its importance will also be discussed. The participants taking this tutorial will be able to evaluate the packaging used in their processes and how it may affect yield and reliability.  They will also be aware of and able to recognize possible hazards.  Increase yield and product reliability can be realized by identifying these packaging issues and implementing recommended corrective actions.

FC262: Electrical Fields and Particles - Practical Considerations for the Factory

Course Length: 3 Hours

ANSI/ESD S20.20 recommends that process essential insulators with a measured electrical field strength of >2000 volts at 1 inch should be kept a minimum of 12 inches from ESD susceptible items. In addition, for close proximity or contact, the standard requires that insulators have an electric field of <125 volts at 1 inch. Just what are the practical considerations of these statements? What is the size of a charged object and magnitude of an electric field that imposes a real risk? The goal of this tutorial is to show, by demonstration, the field strength and resulting induction ability from different sized objects. 

Electric fields are the major contributor (beyond gravity) to attraction of particles to surfaces. The science of particle attraction, adhesion and particle removal is very complex but it is important to have a fundamental understanding if your production processes involve cleanliness of surfaces. This tutorial will cover the important considerations of particle dynamics.   

The audience should gain a practical perspective of size and distance as related to charged objects, electrical fields, induction and the interaction of electric fields with airborne particles.

FC263: Determining the Impact of Static Control Methods

Course Length: 1.5 Hours

Many ESDA standards test a property of a static control method, rather than showing the effect of using the method on production problems. This course discusses how to determine if using a static control method has any impact on static problems. Focusing on production equipment, it includes test methodologies for ESD damage to ICs, contamination affecting semiconductor yields, and ESD-related EMI affecting equipment performance. It references existing test and performance evaluation methods, rather than proposing new methods. Details of the methods and statistical analysis of the results will be discussed.

FC361: Ultra-sensitive (Class 0) Devices: ESD Controls and Auditing Measurements

Course Length: 3 Hours

Advanced ESD Controls and Auditing Measurements for CDM & Class 0 (ultra-sensitive) devices and Circuit Boards are not well known and there are many technical and strategic pitfalls that must be avoided. Industry definitions (threshold levels) for Class 0 will be described and the history of their use will be reviewed. The Class 0 category is broken down into sub-categories of increasing risk. Students will learn how to make valid measurements, avoid common pitfalls, and how to use this data to successfully handle Class 0 sensitivities. Advanced measurements will be described including event detection and high speed current measurements. Students will learn when each measurement type is useful. Compelling case studies will illustrate these techniques and the success they produce.

ESD Control procedures for Class 0 manufacturing require customization, attention to detail and a full understanding of the technology. Thus, each company will need to develop a Class 0 ESD subject matter expert (SME) to ensure the correct and cost effective counter measures are taken. SOPs (Special Operating Procedures) developed by SMEs will be discussed that have proven to virtually eliminate Class 0 failures.

This tutorial will be highly interactive with live demonstrations, in-plant photographs, and video clips. Students will be encouraged to ask questions and actively participate in the discussions. References to technical literature on ultra-sensitive devices will be included.

FC340: ESD Program Development & Assessment (ANSI/ESD S20.20 Seminar)

Preview

Course Length: 12 Hours (2 Days)

Certification: PrM

This seminar provides instruction on designing and implementing an ESD control program based on ANSI/ESD S20.20. The course provides participants with the tools and techniques to prepare for an ESD facility audit. This two-day course is an ESDA certification requirement for in-plant auditors and program managers who are working toward professional ESD certification.

The following topics are covered in this course:

  • Overview of ANSI/ESD S20.20
  • How to approach an assessment
  • Administrative elements
  • ESD program assessment
  • ESD program techniques for different applications
  • Technical elements
  • Overview of the assessment process
  • The audit checklist and follow-up questions

It is recommended that the ESD Program Development and Assessment Seminar be taken after the Certification candidate has taken most of the other program manager related tutorials.

FC360: Electrical Overstress in Manufacturing and Test

Course Length: 3 Hours

Electrical overstress (EOS) is a major cause of device failure in manufacturing and in the field. Despite this, there is relatively little information on the sources of EOS and on prevention practices, particularly for the factory. In this tutorial, the fundamentals of device overstress are reviewed. Relationships among device EOS stressing models, such as the Wunsch-Bell curve, are discussed. The causes of EOS and EOS-like events in manufacturing are described and categorized by source and by stress-type. The difficulties in distinguishing between power-induced EOS and high current ESD events such as charged-board events (CBE) and cable discharge events (CDE) are discussed. Case histories, including failure analysis and root cause determination, are presented and the few relevant industry specifications are reviewed.

FC362: Using Different Air Ionization Technologies and Measuring Process Effects

Course Length: 3

Air Ionizers come in many types and technologies and are application dependent. Measuring beneficial effects of ionization technology upon a process is a big challenge to evaluate system usefulness. Different technologies and different ion generation methods are available and understanding when each should be used and how to evaluate their effectiveness is the cornerstone of this class. The course focuses on the specific cleanliness of each technology and delivery mechanisms for ions. Measuring ionizer performance is a basic tool but does not ensure the value of a static control action; several methods for measuring the process results will be presented. A procedure for microcontamination measurement and statistical analysis will be covered. In the case where electrostatic attraction is causing robotic alignment issues, success can be measured by reduction of voltage on wafers cassettes or robotic arms or the frequency of occurrence of unwanted wafer movements. This is a straightforward electrostatic measurement but it only indicates whether the ionizers are reducing electrostatic charge. The rate at which the effect is taking place is the parameter which is a measure of success. This class will explore these nuances.

DD380/FC380: Electrostatic Calculations for the Program Manager and the ESD Engineer

Course Length: 3 Hours

Certification: PrM

This tutorial focuses on the basic calculations and techniques of use to the program manager and the ESD engineer. The content is at the introductory college pre-calculus and introductory college physics level set in the context of electrostatic discharge and its effects. It is suggested that the student gain some familiarity with these subjects prior to the tutorial. Topics covered include the electric force, the electric field and Coulombs law, electric potential, and voltage. Gauss’ Law is discussed as it relates to the electric field, induction, and the Faraday cup. The capacitance in Q = CV is used to explain charge sharing. RC decay is discussed as it relates to ESD discharge from humans, devices, wrist straps, and materials. After completing this course, the attendee should leave with a proper understanding of the differences among the calculations for peak current, power, energy, and threshold voltage for a simple device.

Essentials for ESD Programs; Factory: Technologies, Controls, Procedures

Course Length: 12 Hours (2 Days)

This two-day seminar consists of concentrated versions of the ten ESDA tutorials which comprise the ESDA Program Manager (PrM) Certification Program:

  • ESD Basics for the Program Manager
  • Ionization and Answers for the Program Manager
  • Packaging Principles for the Program Manager
  • System Level ESD/EMI: Testing to IEC and Other Standards
  • Cleanroom Considerations for the Program Manager
  • How To's of In-Plant ESD Survey and Evaluation Measurements
  • Device Technology and Failure Analysis Overview
  • Electrostatic Calculations for the Program Manager and the
  • ESD Engineer
  • ESD Standards Overview for the Program Manager
  • ESD Program Development & Assessment (ANSI/ESD S20.20 Seminar)

Key concepts and information from the above courses have been selected for this two-day seminar. Many of the demonstrations and videos from ESD Basics Tutorial are included in this seminar. Examples of electrostatics and ESD calculations are included where appropriate throughout the seminar.