Nitesh Trivedi is a Sr Staff Engineer for Infineon Technology in Bangalore, India He has a master degree from Indian Institute of Tech (IIT), Powai, Mumbai. Nitesh has worked with Philips and then NXP from 2000-2010, in different areas such as Production, IO design & ESD. He began working with Infineon Technology in 2010.
Nitesh has published several papers for various International conferences. In 2009 he received the EOS/ESD Symposiums Outstanding Paper Award for his paper titled "A DRC-Based Check Tool for ESD Layout Verification" In 2011 he also presented a paper at the annual EOS/ESD Symposium titled "An Automated Approach for Verification of On-Chip Interconnect Resistance for Electrostatic" In 2007 a paper was also presented at the International Electrastatic Workshop (IEW) titled "Two Approaches for design verification for ESD."
Nitesh is an active member of ESD EDA Tool Working Group at ESDA. and was an active member of the team during the development of ESD TR18.0-01-11 – ESD Electronic Design Automation Checks. This document provides guidance for both the EDA industry and the ESD design community for establishing a comprehensive ESD electronic design automation (EDA) verification flow satisfying the ESD design challenges of modern ICs.
Nitesh says that his volunteer work with ESDA helps him to stay up to date with ESD technology and research.