System Level Tutorials

$950 for 2 tutorials:

System Level ESD-EMI Principles - Design, Troubleshooting, & Demonstrations (DD/FC240) 

This tutorial provides a comprehensive lesson on system-level Electrostatic Discharge (ESD) mitigation for boards, chassis, and other electronic systems. Through practical demonstrations using real circuits, participants will learn effective techniques to minimize detrimental ESD effects. The course combines theoretical foundations with real-world examples from recent applications, ensuring a robust understanding of ESD phenomena and solutions.

Learning Outcomes:

• ESD Soft Failure Mitigation: Understand the mechanisms of ESD-induced soft failures and learn design strategies to eliminate them, ensuring system reliability.
• Noise Entry and Mitigation: Identify pathways for ESD and electrical noise ingress into systems, and acquire practical methods for locating and eliminating these issues using electric and magnetic field analysis.
• Connector Pin Robustness: Discover innovative techniques to enhance circuit board resilience against direct ESD strikes on connector pins, improving overall system immunity.
• Faraday Shield Application: Master the Faraday Shield principle and its practical application to effectively reduce detrimental ESD and Electromagnetic Interference (EMI) effects in real-world scenarios.

Fundamentals of ESD System Level (DD134)*

This tutorial is intended to help those tasked with designing and testing products to system-level ESD standards by providing, first, an overview of what the real-world system ESD threats are and the associated standards that describe these events. Then, detailed information on qualification testing is given on IEC 61000-4-2, the most widely used standard, but also ISO 10605 and other standards. This topic includes waveform verification, discharge points, test levels, and result classification. System level characterization is broken into five different types, including testing of components outside a system, cable discharge events, charge board events, electro-magnetic field scanning, and SEED – system efficient ESD design. The last part of the course dives into the design and simulation strategies for system level robustness where on-board and on-chip protection need to work together. The more popular components for on-board protection are presented and compared.

*1/2 day certification features EDEC-system level segment

Hotel Information

Book your hotel room online! 

Rate: $157
Book By: August 18th

Marriott Riverside at the Convention Center
3400 Market Street
Riverside, California 92501